The strategic objective of the ARTIST2 Network of Excellence is to strengthen European research in Embedded Systems Design, and promote the emergence of this new multi-disciplinary area. Operationally, this is achieved by integrating the teams, and buiding excellence. We gather together the best European teams from the composing disciplines, and will work to forge a scientific community. Integration will be achieved around a Joint Programme of Activities, aiming to create critical mass from the selected European teams.
The consortium is structured by research areas, called “clusters”, which reflect the following elements from of the embedded systems design flow, which is composed of the following cooperating activities, starting with requirements capture and leading to implementation. These activities must be well coordinated, and supported by tools and methods to ensure satisfactory levels of productivity and quality.
- Modelling and Components
- Hard Real-Time
- Adaptive Real-Time
- Compilers and Timing Analysis
- Execution Platforms
- Control for Embedded Systems
- Testing and Verification
The Cluster consists of two sub-Clusters: Compilers and Timing Analysis. Our Chair participates mainly in the latter one, which encompasses the following activities:
- Timing-Analysis Platform
Combine the best components of existing European Timing-Analysis tools and prototypes in a standard tool architecture with well-defined textual interfaces. Our objective is to integrate European efforts on the Timing Analysis of Real-Time Systems, to preserve the existing lead of European Research and Industry in this important sector.
The resulting platform will be used in teaching the technology all over Europe.
- Resource-aware Design
Provide, through the integration of research activities of many participants a viable path for resource-aware software and hardware development. The final objective is to achieve integration of research activities in concrete deliverables:
- A set of tools that can interact and work together and demonstrate the achievable optimizations on a particular hardware platform.
- A methodology that enables the design of predictable embedded systems with a special focus on issues that cut several layers of abstraction, such as hardware and compiler design.
- Architecture-aware compilation
The objective of this activity is to exploit the world-leading position and expertise of academic and industrial cluster partners in order to integrate and further develop the technology currently available with the partners, so as to provide a unified architecture-aware codesynthesis and compiler methodology to a variety of users, also beyond ARTIST.
You can visit the following links for more information about ARTIST2 Network of Excellence: