Control software in embedded hard real-time systems is subject to stringent timing constraints. To compute the required safe upper bounds on its worst-case execution-time (WCET), static timing analysis is used in industry.
Today control software is predominantly developed with model-based design tools such as Matlab Simulink/Stateflow. However, current timing tools lose precision as they consider infeasible executions, e.g., changes between operating modes not admissible in the model. These tools analyze compiled executables where information about the feasibility of executions is hard to derive. We propose systematic methods that make model information available to timing analysis and present promising results with Simulink/Stateflow models.
@conference(SLSF,
author={Lili Tan and Bj\"orn Wachter and Philipp Lucas and Reinhard Wilhelm},
title={Improving Timing Analysis for Matlab Simulink/Stateflow},
booktitle={Proceedings of the 2nd International Workshop on
Model Based Architecting and Construction of Embedded Systems (ACES-MB)},
year=2009,
editor={Stefan Van Baelen and Thomas Weigert and Ileana Ober and Huascar Espinoza},
pages={59--63}
)
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Author: Philipp Lucas.