Transferbereich 14

Runtime Guarantees for modern Processor Architectures

Goals

For embedded systems that are used in real time environments correct and precise estimations of the worst-case execution times (WCET) of their tasks are needed to guarantee that actions take place before a mandatory dead-line.

The problem of finding a tight WCET estimate for a given problem is becoming more and more complicated as hardware becomes more and more complex. Caches and Pipelines represent one of the hardest challenges. Today's embedded systems start to use the same advanced speed-up mechanisms as desktop microprocessors including caches.

The goal of Transferbereich 14 is the development of a prototype system for computing the WCET of modern processors. Our primary target architectures are the Motorola ColdFire 5307 and the Motorola PowerPC 755.

Publications

The list of publications made by the Transferbereich 14 can be found here.

People

Links

Contact Information

mail: Transferbereich 14
FR 6.2 - Informatik
Universität des Saarlandes
Postfach 15 11 50
66041 Saarbrücken
GERMANY
fax:+49-681-302-3065

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