CGiS

CGiS-Logo

Goals

The goal of the CGiS project is to make the advantages of commodity data-parallel hardware available to programmers without special background.

Recent trends in hardware design show a shift in architectural evolution. Higher efficiency is achieved nowadays by increased parallelism. In the CGiS project, we exploit parallelism in various ways:

  • SIMD-parallelism: CPUs with SSE as well as GPUs (graphics processing units) can operate on vector registers.
  • Streaming parallelism: GPUs offer a multitude of independent pipelines, each working a particular program on independent data elements.
  • Processor level parallelism: GPUs can work independently of CPUs, and different CPU cores can also work independently of each other.

For common developers, it is difficult to exploit these facilities. On the one hand, programmers face the inherent challenges of managing parallel executions. On the other hand, most common programming languages have been designed for classical, sequential computers and have to be extended to incorporate features for parallel computations. Yet many algorithms are inherently parallel and can be expressed naturally in terms of independent, parallel computations, e. g., in the area of physical simulations, scientific computing and image processing.

CGiS is a high-level data-parallel programming language. Its syntax and semantics are C-like and designed to be easily recognisable. The CGiS compiler targets various generations of GPUs and SSE-capable CPUs and the Cell processor. The target on which the parallel program is run is completely transparent to the developer and user.

With the completion of the backends for the massive parallelism of GPUs, the SIMD parallelism of modern CPUs and the combined thread and SIMD parallelism of the Cell processor, the CGiS project has finished.

For more details about CGiS, please consult our publications.

People

Core authors:

Contributors:

Publications

Miscellaneous

The CGiS project was funded by the DFG.

DFG-Logo