I was born in 1980 in Saarbrücken / Germany. From winter term 2000/2001 on, I studied computer science at Saarland University. In February 2005, I made my diploma. In April 2005, I started working on my PhD at the chair of Prof. Dr. Wilhelm. Since October 2005, I'm also working as a software engineer at AbsInt Angewandte Informatik GmbH. In April 2011, I have moved to AbsInt GmbH. In late 2012, I defended my PhD thesis with the title "Timing Model Derivation -- Static Analysis of Hardware Description Languages".
- Embedded Systems
- Program Analysis
- Abstract Interpretation
- WCET Timing Analysis
- Compiler Construction
Automatic Verification and Analysis of Complex Systems
Subproject R2: Timing Analysis, Scheduling and Distribution of Real-Time Tasks
- Embedded Software Product-based Assurance (ES_PASS)
- Formal Verification of Computer Systems (Verisoft XT)
- Integrating European Embedded Systems Tools (INTEREST)
- Network of Excellence on Embedded Systems Design (ARTIST2)
- Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-critical Embedded Systems
R. Wilhelm, D. Grund, J. Reineke, M. Schlickling, M. Pister, and C. Ferdinand
IEEE Transactions on CAD of Integrated Circuits and Systems, 28 (7), 2009. [doi] [bib]
- Meeting Real-Time Requirements with Multi-core Processors
D. KÃ¤stner, M. Schlickling, M. Pister, C. Cullmann, G. Gebhard, R. Heckmann, and C. Ferdinand
Computer Safety, Reliability, and Security, Springer, 2012. [doi] [bib]
- New Developments in WCET Analysis
C. Ferdinand, F. Martin, C. Cullmann, M. Schlickling, I. Stein, S. Thesing, and R. Heckmann
Program Analysis and Compilation. Theory and Practice. Essays Dedicated to Reinhard Wilhelm on the Occasion of His 60th Birthday, Springer Verlag, 2007. [bib]
- Semi-Automatic Derivation of Timing Models for WCET Analysis
M. Schlickling, and M. Pister
LCTES '10: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010. [doi] [bib]
- An Abstraction-Aware Compiler for VHDL Models
M. A. Maksoud, M. Pister, and M. Schlickling
Proceedings of the International Conference on Computer Engineering and Systems (ICCES '09), 2009. [doi] [bib]
- Timing Validation of Automotive Software
D. Kästner, R. Wilhelm, R. Heckmann, M. Schlickling, M. Pister, M. Jersak, K. Richter, and C. Ferdinand
3rd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (ISOLA) 2008, 2008. [url] [bib]
- A Framework for Static Analysis of VHDL Code
M. Schlickling, and M. Pister
Proceedings of 7th International Workshop on Worst-case Execution Time (WCET) Analysis, 2007. [ps] [bib]
- 05451 Group 5 – Bananas, Dark Worlds, and AspectH
S. Breu, M. Schlickling, and N. M. F. Rodrigues
Beyond Program Slicing, 2006. [url] [bib]
- Timing Model Derivation – Static Analysis of Hardware Description Languages
Saarland University, 2013. [url] [bib]
- Semi-Automatic Derivation of Abstract Processor Models
M. Pister, M. Schlickling, and M. A. Maksoud
Technical Report, ES_PASS, 2009. [bib]
- Marc Schlickling. Timing Model Derivation -- Static Analysis of Hardware Description Languages. PhD defense talk, Computer Science Department, Saarland University, December 2012. [ pdf ]
- Markus Pister, Marc Schlickling. Towards Automation of Timing Model Derivation. Talk at the semi-anual Verisoft XT workshop, Computer Science Department, Saarland University, November 2009. [ pdf ]
- Marc Schlickling. A Framework for Static Analysis of VHDL Code. Talk at the 7th International Workshop on Worst-Case Execution Time (WCET) Analysis, Scuola Superiore Sant Anna, Pisa, July 2007. [ pdf ]
- Marc Schlickling. Generic Slicing on Machine Code. Talk at the Dagstuhl seminar Beyond Program Slicing, Dagstuhl, November 2005. [ pdf ]
- AVACS workshop 2/2010, Freiburg, September 2010.
- Verisoft XT Project Meeting, Saarbrücken, June 2010.
- AVACS workshop 1/2010, Saarbrücken, March 2010.
- Verisoft XT Project Meeting, Saarbrücken, November 2009.
- Verisoft XT Project Meeting, Kaiserslautern, May 2009.
- Verisoft XT Project Meeting, München, December 2008.
- AVACS workshop 2/2008, Saarbrücken, September 2008.
- Verisoft XT Project Meeting, Dagstuhl Castle, December 2007.
- AVACS DFG review, Freiburg, September 2007.
- 7th International Workshop on Worst-Case Execution Time (WCET) Analysis, Pisa, July 2007.
- ARTIST2 CTA Cluster Meeting, Pisa, July 2007.
- AVACS workshop 1/2007, Saarbrücken, March 2007.
- Internal AVACS R2 meeting, Freiburg, October 2006.
- Klausurtagung "Lehrstuhl Wilhelm", Dagstuhl Castle, September 2006.
- AVACS workshop 1/2006, Saarbrücken, March 2006.
- Seminar "Beyond Program Slicing", Dagstuhl Castle, November 2005.
- AVACS workshop 2/2005, Freiburg, September 2005.
- Klausurtagung "Programming Languages and Compiler Construction", Dagstuhl Castle, February 2004.
- Member of ASTReNet, the Analysis, Slicing and Transformation Research Network.
- Advanced Course "Embedded System Development", winter term 2007.
- Seminar "Embedded Systems", summer term 2006.
- Mohamed Abdel Maksoud. Generating Code from abstracted VHDL.
- ACM Conference on Embedded System Software (EMSOFT): 2006, 2009
- ACM Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES): 2007, 2008
- Design, Automation and Test in Europe (DATE): 2006, 2007
- IEEE International Symposium on Industrial Embedded Systems (SIES): 2011
- IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS): 2006, 2007
- International Static Analysis Symposium (SAS): 2006
- International Workshop on Software and Compilers for Embedded Systems (SCOPES): 2008
- International Workshop on Worst-Case Execution Time Analysis (WCET): 2007, 2010
- Programming Language Design and Implementation (PLDI): 2006