Markus Pister

pister

About Me

I was born in PŁttlingen (Saarland) in 1979 and studied computer science at Saarland University. Since 2005 I am a staff member of the Compiler Design Lab and engaged as software engineer at AbsInt Angewandte Informatik GmbH, a spin-off company from the Compiler Design Lab. In April 2011, I have left saarland university while keeping my employment for AbsInt GmbH.

In September 2012, I have successfully defended my PhD thesis about "Timing Model Derivation – Pipeline Analyzer Generation from Hardware Description Languages"

Research Interests

  • Embedded systems
  • Code generation and optimization
  • Scheduling
  • Software pipelining
  • WCET determination
  • Program analysis

Projects

  • Automatic Verification and Analysis of Complex Systems (AVACS)
  • Design for Predictability and Efficiency (Predator)
  • Embedded Software Product-based Assurance (ES_PASS)
  • Network of Excellence on Embedded Systems Design (ARTIST2)
  • Verisoft XT
  • Verisoft

Publications

Journal Papers

  1. Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-critical Embedded Systems
    R. Wilhelm, D. Grund, J. Reineke, M. Schlickling, M. Pister, and C. Ferdinand
    IEEE Transactions on CAD of Integrated Circuits and Systems, 28 (7), 2009. [doi]  [bib]

Collections

  1. Meeting Real-Time Requirements with Multi-core Processors
    D. Kästner, M. Schlickling, M. Pister, C. Cullmann, G. Gebhard, R. Heckmann, and C. Ferdinand
    Computer Safety, Reliability, and Security, Springer, 2012. [doi]  [bib]

Conference Papers

  1. Semi-Automatic Derivation of Timing Models for WCET Analysis
    M. Schlickling, and M. Pister
    LCTES '10: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010. [doi]  [bib]
  2. An Abstraction-Aware Compiler for VHDL Models
    M. A. Maksoud, M. Pister, and M. Schlickling
    Proceedings of the International Conference on Computer Engineering and Systems (ICCES '09), 2009. [doi]  [bib]
  3. Timing Validation of Automotive Software
    D. Kästner, R. Wilhelm, R. Heckmann, M. Schlickling, M. Pister, M. Jersak, K. Richter, and C. Ferdinand
    3rd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (ISOLA) 2008, 2008. [url]  [bib]
  4. A Framework for Static Analysis of VHDL Code
    M. Schlickling, and M. Pister
    Proceedings of 7th International Workshop on Worst-case Execution Time (WCET) Analysis, 2007. [ps]  [bib]
  5. Generic Software Pipelining at the Assembly Level
    M. Pister, and D. Kästner
    Proceedings of the 7th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2005), 2005. [pdf]  [bib]

PhD Theses

  1. Timing Model Derivation – Pipeline Analyzer Generation from Hardware Description Languages
    M. Pister
    Saarland University, 2012. [url]  [bib]

MSc Theses

  1. Generisches Softwarepipelining auf Assemblerebene
    M. Pister
    Universität des Saarlandes, 2005. [pdf]  [bib]

Technical Reports

  1. Semi-Automatic Derivation of Abstract Processor Models
    M. Pister, M. Schlickling, and M. A. Maksoud
    Technical Report, ES_PASS, 2009. [bib]

Selected Talks

  • Markus Pister. Semi-Automatic Derivation of Timing Models for WCET Analysis. Talk at the AVACS Workshop, Freiburg, Deutschland.
    [pdf]
  • Markus Pister. Semi-Automatic Derivation of Timing Models for WCET Analysis. Talk at the International Conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2010), Stockholm, Sweden.
    [pdf]
  • Markus Pister, Marc Schlickling. Towards Automation of Timing-Model Derivation. Talk at the second Verisoft XT project meeting 2009, Computer Science Department, Saarland University (Germany).
    [ pdf ]
  • Markus Pister. Semi-Automatic Derivation of aiT Timing Models from HW Specifications. Talk at the 1. Verisoft XT project meeting, IBFI Dagstuhl (Germany).
    [ pdf ]
  • Markus Pister. Generic Software pipelining at the assembly level. Talk at the 9th International Workshop on Software and Compilers for Embedded Systems (SCOPES'05), Dallas/Texas (USA),
    [ppt] [pdf]
  • Markus Pister. Generic Software pipelining at the assembly level. Talk at the Dagstuhl seminar Scheduling for Parallel Architectures: Theory, Application, Challenges, March 2005, IBFI Dagstuhl (Germany).
    [ppt] [pdf]

Attended Conferences, Workshops and Seminars

  • AVACS workshop 9/2010, Freiburg, September 2010
  • Cyberphysical Systems Week (CPSWEEK) 2010, Stockholm, Sweden, April 2010, including
    • HSCC: 13th ACM International Conference on Hybrid Systems: Computation and Control
    • IPSN: 8th ACM/IEEE International Conference on Information Processing in Sensor Networks
    • ICCPS: ACM/IEEE International Conference on Cyber-Physical Systems
    • LCTES ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems
    • RTAS: 16th IEEE Real-Time and Embedded Technology and Applications Symposium
  • Verisoft XT project meeting, Computer Science Department, Saarland University, November 2009
  • Verisoft XT project meeting, München, December 2008
  • AVACS workshop 2/2008, Saarbrücken, September 2008
  • 1. Verisoft XT project meeting IBFI Dagstuhl (Germany).
    [ pdf ]
  • AVACS AVACS DFG Review, Freiburg, Freiburg, September 2007.
  • 7th International Workshop on Worst-Case Execution Time (WCET) Analysis, Pisa, July 2007.
  • ARTIST2 CTA Cluster Meeting, Pisa, July 2007.
  • Internal AVACS Subproject R2 meeting, Freiburg, October 2006.
  • Klausurtagung "Lehrstuhl Wilhelm", Dagstuhl Castle, September 2006.
  • AVACS workshop 1/2006, SaarbrŁcken, March 2006.
  • International Workshop on Software and Compilers for Embedded Systems (SCOPES'05), Dallas/Texas (USA), October 2005.
  • Klausurtagung "Programming Languages and Compiler Construction", Dagstuhl Castle, February 2004.

Teaching

Supervised Theses

  • Mohamed Abdel Maksoud. Generating Code from abstracted VHDL

External Reviews

  • International Conference on Embedded Software (EMSOFT): 2010
  • ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES): 2009, 2008, 2007
  • International Workshop on Software and Compilers for Embedded Systems (SCOPES): 2010, 2009, 2008
  • International Workshop on Worst-Case Execution Time Analysis (WCET): 2007
  • International Conference on Compiler Construction (CC): 2007
  • Design, Automation and Test in Europe (DATE): 2007, 2006
  • International Static Analysis Symposium (SAS): 2006
  • IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS): 2006

Links