Oleg Parshin

oleg

Research Interests

  • Embedded Systems
  • WCET Analysis
  • Timing Predictability

Projects

  • ARTIST2 Network of Excellence on Embedded Systems Design

Publications

Conference Papers

  1. Improving the Precision of WCET Analysis by Input Constraints and Model-Derived Flow Constraints
    R. Wilhelm, P. Lucas, O. Parshin, L. Tan, and B. Wachter
    Advances in Real-Time Systems, 2012. [doi]  [bib]
  2. Operating Mode Specific WCET Analysis
    P. Lucas, O. Parshin, and R. Wilhelm
    Proceedings of JRWRTC, 2009. [bib]
  3. Towards Model-Driven Development of Hard Real-Time Systems—Integrating ASCET-MD and aiT/StackAnalyzer
    C. Ferdinand, R. Heckmann, H. Wolff, C. Renz, O. Parshin, and R. Wilhelm
    Proceedings of Automotive Software Workshop in San Diego, 2006. [bib]
  4. Component-Wise Instruction-Cache Behavior Prediction
    A. Rakib, O. Parshin, S. Thesing, and R. Wilhelm
    ATVA 2004, 2004. [bib]

MSc Theses

  1. Formal Simulation of Machine Instructions with Interrupts by Assembler Instructions
    O. Parshin
    Universität des Saarlandes, 2004. [bib]

Attended Conferences, Workshops and Seminars

Teaching

Address

Oleg Parshin
Compiler Design Lab
FR 6.2 - Informatik
Universität des Saarlandes
Postfach 15 11 50
66041 Saarbrücken
Building E1.3, Room 403
Germany
E-m@il:olegATcsDOTuni-saarlandDOTde

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