Claire Maiza (Burguiere)

burguiere

About Me

I studied computer science in IRIT (Toulouse, France) and completed my PhD thesis on "Modeling branch prediction for WCET Analysis" in June 2008. Since September 2008, I work as a postdoc at the compiler design lab.

Research Interests

  • Timing analysis:
    • context switch costs: cache-related preempion delay (CRPD), useful cache blocks analysis (UCB), Definitely-cached UCB (DC-UCB), resilience analysis
    • WCET: branch prediction, from single-core to multi-core systems
  • Predictability of multi-core architectures: bus arbitration, memory hierarchy

Projects

  • Predator Design for Predictability and Efficiency
  • AVACS Automatic Verification and Analysis of Complex Systems

Publications

Journal Papers

  1. Improved Cache Related Pre-emption Delay Aware Response Time Analysis for Fixed Priority Pre-emptive Systems
    S. Altmeyer, R. I. Davis, and C. Maiza
    Real-Time Systems, 2012. [doi]  [bib]
  2. Predictability Considerations in the Design of Multi-Core Embedded Systems
    C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, S. Wegener, and R. Wilhelm
    Ingénieurs de l'Automobile, 807, 2010. [bib]
  3. Cache-related Preemption Delay via Useful Cache Blocks: Survey and Redefinition
    S. Altmeyer, and C. Maiza
    Journal of Systems Architecture, 2010. [doi]  [bib]

Conference Papers

  1. Influence of the Task Model on the Precision of Scheduling Analysis for Preemptive Systems – Status Report
    S. Altmeyer, and C. Maiza
    Proceedings of the 2nd International Real-Time Scheduling Open Problems Seminar, 2011. [bib]
  2. Cache Related Pre-emption Aware Response Time Analysis for Fixed Priority Pre-emptive Systems
    S. Altmeyer, R. I. Davis, and C. Maiza
    Proceedings of the 32nd IEEE Real-Time Systems Symposium (RTSS'11), 2011. [bib]
  3. Static Timing Analysis for Hard Real-Time Systems
    R. Wilhelm, S. Altmeyer, C. Burguière, D. Grund, J. Herter, J. Reineke, B. Wachter, and S. Wilhelm
    VMCAI, 2010. [doi]  [bib]
  4. Resilience Analysis: Tightening the CRPD Bound for Set-Associative Caches
    S. Altmeyer, C. Maiza, and J. Reineke
    LCTES '10: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010. [doi]  [pdf]  [slides]  [bib]
  5. Predictability Considerations in the Design of Multi-Core Embedded Systems
    C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, and R. Wilhelm
    Proceedings of Embedded Real Time Software and Systems, 2010. [pdf]  [bib]
  6. Influence of the Task Model on the Precision of Scheduling Analysis for Preemptive Systems
    S. Altmeyer, and C. Burguière
    Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar, 2010. [bib]
  7. Computing the Maximum Blocking Time for Scheduling with Deferred Preemption
    S. Altmeyer, C. Burguière, and R. Wilhelm
    Workshop on Software Technologies for Future Dependable Distributed Systems, 2009. [doi]  [bib]
  8. Cache-Related Preemption Delay Computation for Set-Associative Caches—Pitfalls and Solutions
    C. Burguière, J. Reineke, and S. Altmeyer
    Proceedings of 9th International Workshop on Worst-Case Execution Time (WCET) Analysis, 2009. [pdf]  [slides]  [bib]
  9. A New Notion of Useful Cache Block to Improve the Bounds of Cache-Related Preemption Delay
    S. Altmeyer, and C. Burguière
    Proceedings of the 21st Euromicro Conference on Real-Time Systems (ECRTS '09), 2009. [doi]  [bib]
  10. On the Complexity of Modeling Dynamic Branch Predictors when Computing Worst-Case Execution Time
    C. Burguière, and C. Rochange
    Proceedings of the ERCIM/DECOS Workshop On Dependable Embedded Systems, 2007. [pdf]  [bib]
  11. History-Based Schemes and Implicit Path Enumeration
    C. Burguière, and C. Rochange
    Proceedings of the 6th International Workshop On Worst-Case Execution Time (WCET) Analysis, 2006. [pdf]  [bib]
  12. A Contribution to Branch Prediction Modeling in WCET Analysis
    C. Burguière, and C. Rochange
    Proceedings of the Conference on Design, Automation and Test in Europe (DATE'05), 2005. [doi]  [ps]  [bib]
  13. Modélisation d'un prédicteur de branchement bimodal dans le calcul du WCET par la methode IPET
    C. Burguière, and C. Rochange
    Proceedings of the Conference on Real-Time Systems (RTS'05), 2005. [pdf]  [bib]
  14. A Case for Static Branch Prediction Modeling in Real-Time Systems
    C. Burguière, C. Rochange, and P. Sainrat
    Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05), 2005. [doi]  [pdf]  [bib]

PhD Theses

  1. Modéliser la prédiction de branchement pour le calcul de temps d'exécution pire-cas
    C. Burguière
    Université Paul Sabatier - Toulouse 3, 2008. [pdf]  [bib]

Technical Reports

  1. Pre-emption Cost Aware Response Time Analysis for Fixed Priority Pre-emptive Systems
    S. Altmeyer, R. I. Davis, and C. Maiza
    Technical Report, University of York, Department of Computer Science, 2011. [pdf]  [bib]

Address

Claire Burguiere
Universität des Saarlandes
Campus E1 3
D-66123 Saarbrücken

Building E1 3, Room 429
Tel: +49 (681) 302 5583
Fax: +49 (681) 302 3065
Mail:burguiere@cs.uni-saarland.de